Conferences

  1. Global optimization approach for circular and chloroplast genome assembly
    S Francois, R Andonov, D Lavenier, H Djidjev
    BICoB 2018 10th International Conference on Bioinformatics and Computational Biology, Las Vegas, USA, 2018
    Best Paper Award

  2. Global Optimization for Scaffolding and Completing Genome Assemblies
    S. François, R. Andonov, D. Lavenier, H. Djidjev
    International Network Optimization Conference, Lisboa, Portugal, 2017

  3. DNA Mapping using Processor-in-Memory Architecture
    D. Lavenier, JF. Roy, D. Furodet
    Workshop on Accelerator-Enabled Algorithms and Applications in Bioinformatics, Dec 2016, Shenzhen, China, 2016

  4. Identifying Genetic Variant Combinations using Skypatterns
    Hoang-Son Pham, D. Lavenier, A. Termier
    7th International Workshop on Biological Knowledge Discovery and Data Mining (Workshop BIOKDD ’16 ), Sep 2016, Porto, Portugal, 2016

  5. GGlobal optimization methods for genome scaffolding
    S. François, R. Andonov, H. Djidjev, D. Lavenier
    12th International Workshop on Constraint-Based Methods for Bioinformatics, Toulouse, France, 2016

  6. KLAST: fast and sensitive software to compare large genomic databanks on cloud
    I. Petrov, S. Brillet, E. Drezen, S. Quiniou, L. Antin, P. Durand, D. Lavenier
    BIOCOMP’15, International Conference on Bioinformatics and
    Computational Biology, 2015, Las Vegas

  7. Efficient Multi-GPU Algorithm for All-Pairs Shortest Paths
    G. Chapuis, H. Djidjev, R. Andonov, S. Thulasidasan, D. Lavenier
    28th IEEE International Parallel & Distributed Processing Symposium, May 19-23, PHOENIX (Arizona) USA, 2014

  8. COMMET: comparing and combining multiple metagenomic datasets
    N Maillet, G Collet, T Vannier, D Lavenier, P Peterlongo
    IEEE International Conference on Bioinformatics and Biomedicine (BIBM), Belfast, 2-5 nov. 2014

  9. FAssem: FPGA Based Acceleration of De Novo Genome Assembly
    B. Sharat Chandra Varma, P. Kolin, M. Balakrishnan, D. Lavenier
    Proceeding of The 21st Annual International IEEE Symposium on Field Programmable Custom Computing Machines, 2013

  10. Parallel seed-based approach to protein structure similarity detection
    G. Chapuis1, M. Le Boudic-Jamin, R. Andonov, H. Djidjev, D. Lavenier
    10th International Conference on Parallel Processing and Applied Mathematics, Parallel Bio-Computing, 2013

  11. Seamless coarse grained parallelism integration in intensive bioinformatics workflows
    F. Moreews, D. Lavenier
    International Workshop on Parallelism in Bioinformatics, 2013

  12. Parallel and memory-efficient reads indexing for genome assembly
    R. Chikhi, G. Chapuis, D. Lavenier
    Parallel Processing and Applied Mathematics, LNCS Vol. 7204, 2012, pp 272-280

  13. Localized Genome Assembly from Reads to Scaffolds: Practical Traversal of the Paired String Graph
    R. Chikhi, D. Lavenier
    Algorithms in Bioinformatics, LNCS Vol. 6833, 2011, pp 39-48

  14. HLS Tools for FPGA : faster development with better performances
    A. Cornu, S. Derrien, D. Lavenier
    Reconfigurable Computing: Architectures, Tools and Applications, LNCS Vol. 6578, 2011, pp 67-78

  15. SLICEE: A Service oriented middleware for intensive scientific computation
    J. Piat, F. Moreews, O. Collin, A. Cornu, D. Lavenier
    World Congress on Services, 2011

  16. A Reconfigurable Disparity Engine for Stereovision in Advanced Driver Assistance Systems
    M. Darouich1, S. Guyetant, D. Lavenier
    International Symposium on Applied Reconfigurable Computing, 2010

  17. c-GAMMA: comparative genome analysis of molecular markers, Pattern Recognition in Bioinformatics
    P. Perterlongo, J. Nicolas, D. Lavenier, R. Vorc h, J. Querellou
    Lecture Notes in Computer Science Volume 5780, 2009, pp 255-269

  18. Implementing protein seed-based comparison algorithm on the SGI RASC-100 platform
    V.H. Nguyen, A. Cornu, D. Lavenier
    IPDPS, Reconfigurable Architectures Workshop, 2009

  19. GPU accelerated Rna folding algorithm
    G. Rizk, D. Lavenier
    Computational Science, ICCS 2009, Lecture Notes in Computer Science Volume 5544, 2009, pp 1004-1013

  20. GPU accelerated Rna-Rna interaction algorithm
    G. Rizk, D. Lavenier
    EMB Conference 2008: Leading Applications and Technologies in bioinformatics, 2008

  21. Efficient Parallelization of a Protein Sequence Comparison Algorithm on Manycore Architecture
    Y. Xiaochun, V-H. Nguyen, D. Lavenier, F. Dongruy
    Ninth International Conference on Parallel and Distributed Computing, Applications and Technologies, 2008

  22. Parallelizing the ACGT OncoSimulator
    D. Lavenier, J. Jacques
    International Advanced Research Workshop on In Silico Oncology: Advances and Challenges, 2008

  23. Speeding up Subset Seed Algorithm for Intensive Protein Sequence Comparison
    V-H. Nguyen, D. Lavenier
    International Conference on research, innovation & vision for the future, 2008

  24. Ordered Index Seed Algorithm for Intensive DNA Sequence Comparison
    D. Lavenier
    IEEE International Workshop on High Performance Computational Biology, 2008

  25. Utilization of Subset Seeds on a Reconfigurable Architecture
    M. Giraud, G. Kucherov, D. Lavenier, L. Noé, P. Peterlongo
    London Algorithm Workshop, 2007

  26. Protein similarity search with subset seeds on a dedicated reconfigurable hardware,
    P. Peterlongo, L. Noé, D. Lavenier, G. Georges, J. Jacques, G. Kucherov, M. Giraud
    Parallel Bio-Computing Workshop, 2007

  27. Seed-based Genomic Sequence Comparison using a FPGA/FLASH Accelerator
    D. Lavenier, X. Xinchun, G. Georges
    International IEEE Conference on Field Programmable Technology, 2006

  28. Path-Equivalent Removals of Epsilon-Transitions in a Genomic Weighted Finite Automaton
    M. Giraud, P. Veber, D. Lavenier
    International Conference on implementation and application of Automata, 2006

  29. A Low Complex Scheduling Algorithm for Multi-Processor System-on-Chip
    N. Ventroux, D. Lavenier
    International Conference on Parallel and Distributed Computing and Networks, 2005

  30. Linear Encoding Scheme for Weighted Finite Automata
    M. Giraud, D. Lavenier
    Implementation and Application of Automata, Lecture Notes in Computer Science Volume 3317, 2005, pp 146-155

  31. Dynamic programming for LR-PCR segmention of bacterium genomes
    R. Andonov, D. Lavenier, P. Veber, N. Yanev
    International Workshop on High Performance Computational Biology, 2004

  32. Evaluation of anchoring scheme for fast DNA Sequence Alignment
    S. Guyétant, D. Lavenier
    European Conference on Computational Biology, 2003

  33. GENOFRAG: a software to design primers optimized for whole genome scaning by long-range PCR amplification. Application to the study of Staphylococcus aureus genome plasticity
    N. Ben Zacour, M. Gautier, R. Andonov, D. Lavenier, P. Veber, A. Sorokin, Y. Le Loir
    European Conference on Computational Biology, 2003

  34. A reconfigurable parallel disk system for filtering genomic banks
    D. Lavenier, D. Guyétant, S. Derrien, S. Rubini
    Engineering of Reconfigurable Systems and Algorithms, 2003

  35. GénoGRID: an experimental grid for genomic applications
    D. Lavenier, H. Leroy, M. Mac Wing, R. Andonov, M. Hurfin, P. Raipin-Parvedy, L. Mouchard, F. Guinand
    HealthGrid Conference, 2003

  36. Placing, Routing and Editing Virtual FPGAs
    L. Lagadec, D. Lavenier, E. Fabiani, B. Pottier
    Field-Programmable Logic and Applications, Lecture Notes in Computer Science Volume 2147, 2001, pp 357-366

  37. Mutable Functional Units and their Applications on Microprocessors
    Y. Solihin, K. Cameron, Y. Luo, D. Lavenier, M. Gokhale
    International Conference on Computer Design, 2001

  38. Systolic Array for computing the pixel purity index (PPI) algorithm on hyperspectral images
    D. lavenier, E. Fabiani, S. Derrien, C. Wagner
    SPIE Conference on Imaging Spectrometry, 2001

  39. Experimental evaluation of place-and-route of regular arrays on Xilinx chips
    E. Fabiani, D. Lavenier
    International Conference on Engineering of Reconfigurable Systems and Algorithms, 2001

  40. Early Experience with a Hybrid Processor: K-Means Clustering
    M. Gokhale, J. Frigo, K. McCabe, J. Theiler, D. Lavenier
    International Conference on Engineering of Reconfigurable Systems and Algorithms, 2001

  41. Mutable Functional Units: Initial Results
    Y. Solihin, K. Cameron, Y. Luo, D. Lavenier, M. Gokhale
    IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

  42. Evaluation of the Streams-C C-to-FPGA Compiler: An Application Perspective
    J. Frigo, M. Gokhale, D . Lavenier
    ACM International Symposium on Field-Programmable Gate Arrays, 2001

  43. FPGA Implementation of the Pixel Purity Index Algorithm
    D. Lavenier, J. Theiler, J. Szymanski, M. Gokhale, J. Frigo
    Workshop on Reconfigurable Architectures, 2000

  44. Advanced processing for high-bandwith sensor systems
    J. Szymanski, P. Blain, J. Bloch, C. Brislawn, S. Brumby, M. Caffrey, M. Dunham, J. Frigo, M. Gokhale, N. Harvey, G. Kenyon, W. Kim, J. Layne, D. Lavenier, K. McCabe, M. Mitchell, K. Moore, S. Perkins, R. Porter, S. Robinson, A. Salazar, J. Theiler, A. Young
    SPIE International Conference on Optical Science and Technology, 2000

  45. Using blocks of skewers for faster computation of pixel purity index
    J. Theiler, D. Lavenier, N. Harvey, S. Perkins, J. Szymanski
    SPIE International Conference on Optical Science and Technology, 2000

  46. Placement of Linear Arrays
    E. Fabiani, D. Lavenier,
    International Conference on Field Programmable Logic and Applications, 2000

  47. Reconfigurable Arithmetic and Logic Unit
    D. Lavenier, Y. Solihin, K. Cameron
    Symposium en Architecture de Machines, 2000

  48. A systematic approach for investigating primary iron overloads : Generation of iron-related SNPs
    J. Mosser, N. Soriano, F. Wojcik, V. Douabin, H. Ferran, S. Sachot, D. Lavenier, R. Moirand, Y. Deugnier, JY. Le Gall, V. David
    Annual Meeting of the American Society of Human Genetics Applications, 1999

  49. Loop Parallelization on a Reconfigurable Coprocessor
    E. Fabiani, D. Lavenier, L. Perraudeau
    Workshop on Design, Test and Applications, 1998

  50. Computing Goldbach partitions using pseudo-random bit generator operators on a FPGA systolic array,
    D. Lavenier, Y. Saouter
    International Conference on Field Programmable Logic and Applications, 1998

  51. Parallel Processing for Scanning Genomic Data-Bases
    D. Lavenier, JL. Pacherie
    International Conference on Parallel Computing, 1997

  52. Design and Implementation of a Parallel Architecture for Biological Sequence Comparison
    P. Guerdoux-Jamet, D. Lavenier, C. Wagner, P. Quinton
    European Conference on Parallelism, 1996

  53. Systolic Filter for fast DNA Similarity Search
    P. Guerdoux-Jamet, D. Lavenier
    International Conference on Application Specific Array Processors, 1995

  54. From High Level Programming Model to FPGA Machines
    JP. Banâtre, D. Lavenier, M. Viellot
    IEEE Symposium on FPGAs for Custom Computing Machine, 1994

  55. An Integrated 2-D Systolic Array for String Comparison
    D. Lavenier
    First South American Workshop on String Processing, 1993

  56. Relacs for Systolic Programming
    F. Raimbault, D. Lavenier
    International Conference on Application Specific Array Processors, 1993

  57. I/O Data Management on SIMD Systolic Arrays
    P.Frison, D. Lavenier, F. Raimbault
    International Conference on Application Specific Array Processors, 1993

  58. Fine grain parallelism on a MIMD machine using FPGAs
    D. Lavenier, B. Pottier, F. Raimbault, S. Rubini
    IEEE Symposium on FPGAs for Custom Computing Machine, 1993

  59. A High Performance Systolic Chip for Spelling Correction
    D. Lavenier
    Euro-Asic Conference 1992

  60. Experience in the Design of Parallel Processor Arrays
    P. Frison, D. Lavenier
    Internationnal Workshop on Algorithms and Parallel VLSI Architectures, 1991

  61. A Fully Integrated Systolic Spelling Co-processor
    P. Frison, D. Lavenier
    VLSI Conference, 1991

  62. Designing Specific Systolic Array with the API15C chip
    P. Frison, E. Gautrin, D. Lavenier, J-L. Scharbarg
    Application Specifique Array Processor Conference, Princeton, NJ, USA, 1990

  63. High Rate Sigma Filtering, Feasibility Studies on Processors Networks
    D. Lavenier, B. Pottier
    Workshop on Parallel Architectures on Silicon, Grenoble, France, 1989

  64. A VLSI Programmable Systolic Architecture
    P. Frison, D. Lavenier, H. Leverge, P. Quinton
    International Conference on Systolic Array, Killarney, 1989

  65. API15C A Programmable Chip for Systolic Architecture
    P. Frison, E. Gautrin, D. Lavenier, J-L. Scharbarg
    Workshop on Parallel Architectures on Silicon, 1989

  66. A VLSI Systolic Machine for String Correction
    P. Frison, D. Lavenier
    International Conference on Supercomputing, 1988

  67. A Fast Machine for Prototyping Correction Algorithms
    P. Frison, D. Lavenier
    User Oriented Contend-based text and Image Handling Conference, 1988

Comments are closed.